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(parent: 8399a74) | patch
Blackfin: handle BF561 Core B memory regions better when SMP=n
authorMike Frysinger <vapier@gentoo.org>
Mon, 29 Jun 2009 18:20:10 +0000 (14:20 -0400)
committerMike Frysinger <vapier@gentoo.org>
Thu, 16 Jul 2009 05:52:24 +0000 (01:52 -0400)
commitfb4b5d3a379824d94fd71fc1aa78e9dbcb15b948
tree104b640b09ebbc58f4eb3b67fd190bf7bf9a3912tree | snapshot (tar.gz zip)
parent8399a74f61c69c7d233924de3dd314ca0effa16acommit | diff
Blackfin: handle BF561 Core B memory regions better when SMP=n

Rather than assume Core B is always run with caches turned on, let people
load into any of the on-chip memory regions.  It is their business how the
SRAM/Cache regions are utilized, so don't prevent them from being able to
load into them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
arch/blackfin/kernel/process.c diff | blob | blame | history
arch/blackfin/mach-bf561/include/mach/mem_map.h diff | blob | blame | history
Motorola kernel-slsi