PCI/ASPM: Clear the correct bits when enabling L1 substates
authorYicong Yang <yangyicong@hisilicon.com>
Fri, 13 Mar 2020 09:53:47 +0000 (17:53 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 24 Apr 2020 06:00:36 +0000 (08:00 +0200)
commitfac29b1f331dc4f87046282a365cfc21f856e40d
treef7757f88c4427c0af512b6070458cb9173e4aa24
parent2e68019fb4e20281072f7b3dd4db863c9e9f01d5
PCI/ASPM: Clear the correct bits when enabling L1 substates

commit 58a3862a10a317a81097ab0c78aecebabb1704f5 upstream.

In pcie_config_aspm_l1ss(), we cleared the wrong bits when enabling ASPM L1
Substates.  Instead of the L1.x enable bits (PCI_L1SS_CTL1_L1SS_MASK, 0xf), we
cleared the Link Activation Interrupt Enable bit (PCI_L1SS_CAP_L1_PM_SS,
0x10).

Clear the L1.x enable bits before writing the new L1.x configuration.

[bhelgaas: changelog]
Fixes: aeda9adebab8 ("PCI/ASPM: Configure L1 substate settings")
Link: https://lore.kernel.org/r/1584093227-1292-1-git-send-email-yangyicong@hisilicon.com
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org # v4.11+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pci/pcie/aspm.c