ASoC: fsl_esai: Bypass divider settings if clock requirement is not changed
authorNicolin Chen <Guangyu.Chen@freescale.com>
Tue, 6 May 2014 08:56:01 +0000 (16:56 +0800)
committerMark Brown <broonie@linaro.org>
Mon, 12 May 2014 22:15:25 +0000 (23:15 +0100)
commitf975ca46f634660a52d8c815b465258ae9bce3b7
tree781c34ceec8d6463c57f59f8305db607eaca9f0f
parent3e185238a37d1f0a37a1d910344cdcff578bf333
ASoC: fsl_esai: Bypass divider settings if clock requirement is not changed

We don't need to change those dividers if bclk and mclk remains the same
directions and values.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/fsl/fsl_esai.c