ARM: mvebu: Allow to power down L2 cache controller in idle mode
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 14 Apr 2014 15:10:10 +0000 (17:10 +0200)
committerJason Cooper <jason@lakedaemon.net>
Thu, 8 May 2014 16:18:56 +0000 (16:18 +0000)
commitf713c7e7421d6945c977c8d8813e8089f925de41
tree3895c2af9593f7700057fd4ed7f1f2553e20ae16
parent1a6bfbc339b6a2b59a8f88fa494fe70073cdb85a
ARM: mvebu: Allow to power down L2 cache controller in idle mode

This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.

This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/mach-mvebu/pmsu.c