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(parent: da2f41d) | patch
drm/i915/bxt: Enable DC5 during runtime resume
authorImre Deak <imre.deak@intel.com>
Wed, 20 Apr 2016 17:27:57 +0000 (20:27 +0300)
committerImre Deak <imre.deak@intel.com>
Fri, 22 Apr 2016 12:12:05 +0000 (15:12 +0300)
commitf62c79b33ff150da40fcdfc8cd48d0dd77f62902
tree5d9941fe3511347de01a645e74a3efcbe636250btree | snapshot (tar.gz zip)
parentda2f41d107e57074814ad44f4cea2b7befe3b7c4commit | diff
drm/i915/bxt: Enable DC5 during runtime resume

Right after runtime resume we know that we can re-enable DC5, since we
just disabled DC9 and power well 2 is disabled. So enable DC5 explicitly
instead of delaying this until the next time we disable power well 2.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461173277-16090-5-git-send-email-imre.deak@intel.com
drivers/gpu/drm/i915/i915_drv.c diff | blob | blame | history
drivers/gpu/drm/i915/intel_drv.h diff | blob | blame | history
drivers/gpu/drm/i915/intel_runtime_pm.c diff | blob | blame | history