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(parent: e86ffc4) | patch
clk: exynos5250: register APLL rate table
authorAndrew Bresticker <abrestic@chromium.org>
Fri, 8 Nov 2013 10:14:08 +0000 (15:44 +0530)
committerTomasz Figa <t.figa@samsung.com>
Wed, 8 Jan 2014 17:01:49 +0000 (18:01 +0100)
commitf521ac8b390cd6e1ce3407442d500528becd5874
treef986ab3e2369bf920fbdf31621ccc8260c50485btree | snapshot (tar.gz zip)
parente86ffc4199c6004274cb4a169c7f84cc489532d4commit | diff
clk: exynos5250: register APLL rate table

Register the APLL rate table so that we can set the APLL rate from
the cpufreq driver.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c diff | blob | blame | history