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(parent: 7f0b97d) | patch
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
authorGabriel Fernandez <gabriel.fernandez@st.com>
Thu, 16 Mar 2017 08:16:40 +0000 (09:16 +0100)
committerMichael Turquette <mturquette@baylibre.com>
Wed, 12 Apr 2017 16:07:42 +0000 (18:07 +0200)
commitef18910479b7b4c5e8132f8a40a2a8176ef076f1
tree68ba0638bbf1ee1f4c30460044db8e6f51d22103tree | snapshot (tar.gz zip)
parent7f0b97d5bb4c1c99c38dd6770ad11f714ea42583commit | diff
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ

0000: PLLQ = 0, wrong configuration
0001: PLLQ = 1, wrong configuration
...
0010: PLLQ = 2
0011: PLLQ = 3
0100: PLLQ = 4
...
1111: PLLQ = 1

Use divider table to exclude 0 and 1 values.

Fixes: 83135ad3c517 ("clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards")

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
drivers/clk/clk-stm32f4.c diff | blob | blame | history