drm/ast: Fix incorrect register check for DRAM width
authorTimothy Pearson <tpearson@raptorengineeringinc.com>
Fri, 26 Feb 2016 21:29:32 +0000 (15:29 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 9 Mar 2016 23:31:54 +0000 (15:31 -0800)
commiteed92d81a3f0d555c13f73e4c35e6017c76904ac
treebd47d2097f9c6a7b49df0f7de0ef4f1ac1495c03
parent4e24fd54662144e7ed6aa4ca6279dc6cf29dd57e
drm/ast: Fix incorrect register check for DRAM width

commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 upstream.

During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10) was checked in the "SDRAM Bus Width Status" register
to determine DRAM width.

Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05.

Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/ast/ast_main.c