drm/tilcdc: Adjust the FB_CEILING address
authorKarl Beldan <kbeldan@baylibre.com>
Tue, 23 Aug 2016 12:56:59 +0000 (12:56 +0000)
committerJyri Sarha <jsarha@ti.com>
Thu, 1 Sep 2016 19:29:12 +0000 (22:29 +0300)
commitee8c42baebfa28fddb0d0657a87444a1ef3806ed
tree5b01bdd8cf46e6a8f0088713e1d031d2b564aceb
parenta3479c4fa0f149d9f3f6f88c173c4f4cd07a1714
drm/tilcdc: Adjust the FB_CEILING address

The LCDC seems to expect its framebuffer ceiling address pointer to be
an inclusive bound.  The IP rev2 seems to cope with that but rev1 (as
found on the LCDK) don't.
Also note that this is what the framebuffer code does in da8xx-fb.c.

Since, as the TRM puts it, "The 2 LSBs are hardwired to 00b", the
dma_addr_t can be decremented without cast.
I tested it with a v2 (AM335x, rev  0x4F201000) and an LCDK (v1).

Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
drivers/gpu/drm/tilcdc/tilcdc_crtc.c