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(parent: 5dc5298) | patch
drm/i915: add haswell_set_pipeconf
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 5 Oct 2012 15:05:57 +0000 (12:05 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 10 Oct 2012 14:06:30 +0000 (16:06 +0200)
commitee2b0b382a7e6cbf3549559ec7dc86c63f5aa3d1
tree1622293948061a4510ac3cb285b4fdf2a6a09440tree | snapshot (tar.gz zip)
parent5dc5298bb3e5d72af6bab5c1d43dad9a07052982commit | diff
drm/i915: add haswell_set_pipeconf

It's a copy of ironlake_set_pipeconf with 2 differences:
  - There is no BPC field to set.
  - The interlaced mask is now 2 bits instead of 3.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history
drivers/gpu/drm/i915/intel_display.c diff | blob | blame | history