drm/i915: Drop the HSW special case from __gen6_gt_wait_for_thread_c0()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 13 Nov 2014 20:12:52 +0000 (22:12 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 17 Nov 2014 18:11:09 +0000 (19:11 +0100)
commiteb88bd1b47afd4d1f2754bbcc4bd1a5e57f31ebd
treeb31703cbba0b899c14f9e3c58fb308a5f04e8fc3
parentf5f7d3c6e46ec8d4f8a38055267de89ec57b42b9
drm/i915: Drop the HSW special case from __gen6_gt_wait_for_thread_c0()

Bits [18:16] of GEN6_GT_THREAD_STATUS_REG have always had the same
meaning since SNB. So treating them as something special for HSW doesn't
make sense to me.

Also the bits *seem* to work exactly the same way on IVB, HSW GT2 and
HSW GT3. At least intel_reg_read gives the identical results on all
platforms with and without forcewake.

Also the HSW PM guide rev 0.99 (ww05 2013) doesn't say anything about
those bits. It just says to poll for bits [2:0]. As does the more recent
BDW PM guide.

So just drop the HSW special case and treat all platforms the same way.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S<deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_uncore.c