drm/i915/gvt: force-nopriv register handling
authorZhao Yan <yan.y.zhao@intel.com>
Tue, 21 Feb 2017 02:38:53 +0000 (10:38 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 23 Feb 2017 09:32:15 +0000 (17:32 +0800)
commite6cedfea6b8dcb205f75ea632570f52d2ffd1251
tree14665e05d19f39e3a3fb78c5146a7ad849b96377
parent4c4b22abb3d405c5c194b02255eecc1a9eff42cf
drm/i915/gvt: force-nopriv register handling

add a whitelist to check the content of force-nonpriv registers

v3:
per He Min's comment, modify in_whitelist()'s return type to bool, and use
negative value as the return value for failure for force_nonpriv_write().

v2:
1. split a big patch into two smaller ones per zhenyu's comment.
this patch is the mmio handling part for force-nopriv registers

2. per zhenyu's comment, combine all non-priv registers into a single
MMIO_DFH entry

Signed-off-by: Zhao Yan <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c