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(parent: 01d7aaf) | patch
spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI
authorChew, Chiau Ee <chiau.ee.chew@intel.com>
Fri, 13 Jun 2014 15:57:25 +0000 (23:57 +0800)
committerMark Brown <broonie@linaro.org>
Tue, 17 Jun 2014 14:45:52 +0000 (15:45 +0100)
commite61f487fd596ce570e87ccfdc0a7fc9fa87aced9
tree7f7ac8e9170d7c41cb49f2abde20542e80309df2tree | snapshot (tar.gz zip)
parent01d7aafb3fbaafe2403780ef9ed497b3289ab1b9commit | diff
spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI

It was observed that after module removal followed by insertion,
the SW mode chipselect is not properly set. Thus causing transfer
failure due to incorrect CS toggling.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
drivers/spi/spi-pxa2xx.c diff | blob | blame | history