iommu: add ARM LPAE page table allocator
authorWill Deacon <will.deacon@arm.com>
Fri, 14 Nov 2014 17:18:23 +0000 (17:18 +0000)
committerWill Deacon <will.deacon@arm.com>
Mon, 19 Jan 2015 14:46:44 +0000 (14:46 +0000)
commite1d3c0fd701df831169b116cd5c5d6203ac07f70
treeeb2537042682bf45a36148d06bb0bfb10ce3da74
parentfdb1d7be7c4d452e9735aeb2b60ae8a2fcf0a514
iommu: add ARM LPAE page table allocator

A number of IOMMUs found in ARM SoCs can walk architecture-compatible
page tables.

This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8
long-descriptor page tables. 4k, 16k and 64k pages are supported, with
up to 4-levels of walk to cover a 48-bit address space.

Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
MAINTAINERS
drivers/iommu/Kconfig
drivers/iommu/Makefile
drivers/iommu/io-pgtable-arm.c [new file with mode: 0644]
drivers/iommu/io-pgtable.c
drivers/iommu/io-pgtable.h