drm/i915: Provide PDP updates via MMIO
authorBen Widawsky <benjamin.widawsky@intel.com>
Fri, 6 Dec 2013 22:10:47 +0000 (14:10 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 18 Dec 2013 14:27:43 +0000 (15:27 +0100)
commite178f7057b81c87a7ceaae0ca204487b6f7eedcf
tree8854c7c82543926d61b87aa0f73f91f63524add1
parentf7698ba75fa283435f5077b9dfb4319d28b9de9a
drm/i915: Provide PDP updates via MMIO

The initial implementation of this function used MMIO to write the PDPs.
Upon review it was determined (correctly) that the docs say to use LRI.
The issue is there are times where we want to do a synchronous write
(GPU reset).

I've tested this, and it works. I've verified with as many people as
possible that it should work.

This should fix the failing reset problems.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_gtt.c