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(parent: 8183e2b) | patch
sparc64: Fix Niagara2 perf event handling.
authorDavid S. Miller <davem@davemloft.net>
Tue, 5 Jan 2010 07:16:03 +0000 (23:16 -0800)
committerDavid S. Miller <davem@davemloft.net>
Tue, 5 Jan 2010 07:16:03 +0000 (23:16 -0800)
commite04ed38d4e0cd32141f723560efcc8252b0241e2
treef4beace901f1aff12d5f5532b3e1aa615bf6503dtree | snapshot (tar.gz zip)
parent8183e2b38480672a1f61d416812ac078ce94b67bcommit | diff
sparc64: Fix Niagara2 perf event handling.

For chips like Niagara2 that have true overflow indications
in the %pcr (which we don't actually need and don't use)
the interrupt signal persists until the overflow bits are
cleared by an explicit %pcr write.

Signed-off-by: David S. Miller <davem@davemloft.net>
arch/sparc/kernel/perf_event.c diff | blob | blame | history