drm/i915/dsi: Group DPOunit clock gate workaround with PLL enable
authorHans de Goede <hdegoede@redhat.com>
Wed, 1 Mar 2017 13:15:00 +0000 (15:15 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 1 Mar 2017 13:57:53 +0000 (15:57 +0200)
commitdeae2006a3a8d71ebf2b07a9f8621cfda0b3b6e7
treee1151a7060ca092c8576a4aafbdbcb003b75b48c
parentc7dc5275bcbda8bff2acfad98a08964017644186
drm/i915/dsi: Group DPOunit clock gate workaround with PLL enable

Move the DPOunit clock gate workaround to directly after the PLL enable.

The exact location of the workaround does not matter and there are 2
reasons to group it with the PLL enable:

1) This moves it out of the middle of the init sequence from the spec,
   making it easier to follow the init sequence / compare it to the spec

2) It is grouped with the pll disable call in intel_dsi_post_disable,
   so for consistency it should be grouped with the pll enable in
   intel_dsi_pre_enable

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1488374106-4949-5-git-send-email-jani.nikula@intel.com
drivers/gpu/drm/i915/intel_dsi.c