drm/amd/amdgpu: Introduction of SI registers (v2)
authorTom St Denis <tom.stdenis@amd.com>
Wed, 26 Oct 2016 15:58:25 +0000 (11:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Nov 2016 15:21:07 +0000 (10:21 -0500)
commitde2bdb3dcf9228030b4e0a2d83f3d6b6bedc6c33
tree407e595fd95320a5bda902643b648ee185653639
parent3f12325ab8dc3a35f77eaf0155bd6d6e78f67e9c
drm/amd/amdgpu: Introduction of SI registers (v2)

This introduces the SI registers in the amdgpu
driver style.

v2: squash duplicates fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
16 files changed:
drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h [new file with mode: 0644]
drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h [new file with mode: 0644]