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(parent: 5b415f1) | patch
PCI: Disable cardbus bridge MEM1 prefetchable bit
authorYinghai Lu <yinghai@kernel.org>
Fri, 10 Feb 2012 23:33:46 +0000 (15:33 -0800)
committerJesse Barnes <jbarnes@virtuousgeek.org>
Thu, 23 Feb 2012 19:59:45 +0000 (11:59 -0800)
commitdcef0d06b34a80071da4496556e85f9bf3b3c0bf
tree0801a6c7dbbcc2ac3ba05b59e506ebf6cc5d3df7tree | snapshot (tar.gz zip)
parent5b415f1e79e0c09366f26e3eabe751642059285acommit | diff
PCI: Disable cardbus bridge MEM1 prefetchable bit

Some BIOSes enable prefetch on both MEM0 and MEM1.  But the cardbus code
assumes MEM1 is non-pref...

Discussion could be found at:
https://lkml.org/lkml/2012/1/12/1
https://bugzilla.kernel.org/show_bug.cgi?id=41622#c23

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Tested-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
drivers/pci/setup-bus.c diff | blob | blame | history
Motorola kernel-slsi