gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine
authorLucas Stach <l.stach@pengutronix.de>
Wed, 8 Mar 2017 11:13:13 +0000 (12:13 +0100)
committerPhilipp Zabel <p.zabel@pengutronix.de>
Wed, 15 Mar 2017 14:42:34 +0000 (15:42 +0100)
commitdcddda561b91fe82a8201ba7f5b4237be4c79219
tree0150fb537ee6a7aa03a3b274e75e3951c81a1cc7
parentf6b50ef14ea84725c1b41c9ffea611cdfb71c7dd
gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine

The Prefetch Resolve Engine is a prefetch and tile resolve engine
which prefetches display data from DRAM to an internal SRAM region.
It has a single clock for configuration register access and the
functional units. A single shared interrupt is used for status and
error signaling.

The only external dependency is the SRAM region to use for the
prefetch double buffer.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt