powerpc: atomic: Implement atomic{, 64}_*_return_* variants
authorBoqun Feng <boqun.feng@gmail.com>
Wed, 6 Jan 2016 02:08:25 +0000 (10:08 +0800)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 17 Feb 2016 13:11:21 +0000 (00:11 +1100)
commitdc53617c4a3f6ca35641dfd4279720365ce9f4da
tree925cc4b32384a52b9b10ed2e5136829fde079b80
parente1ab7f39d7e0dbfbdefe148be3ae4ee121e47ecc
powerpc: atomic: Implement atomic{, 64}_*_return_* variants

On powerpc, acquire and release semantics can be achieved with
lightweight barriers("lwsync" and "ctrl+isync"), which can be used to
implement __atomic_op_{acquire,release}.

For release semantics, since we only need to ensure all memory accesses
that issue before must take effects before the -store- part of the
atomics, "lwsync" is what we only need. On the platform without
"lwsync", "sync" should be used. Therefore in __atomic_op_release() we
use PPC_RELEASE_BARRIER.

For acquire semantics, "lwsync" is what we only need for the similar
reason.  However on the platform without "lwsync", we can use "isync"
rather than "sync" as an acquire barrier. Therefore in
__atomic_op_acquire() we use PPC_ACQUIRE_BARRIER, which is barrier() on
UP, "lwsync" if available and "isync" otherwise.

Implement atomic{,64}_{add,sub,inc,dec}_return_relaxed, and build other
variants with these helpers.

Signed-off-by: Boqun Feng <boqun.feng@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/atomic.h