drm: rcar-du: Add DPLL support
authorKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Fri, 11 Nov 2016 17:07:41 +0000 (18:07 +0100)
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tue, 4 Apr 2017 14:04:19 +0000 (17:04 +0300)
commitdc4aedbf7c152c092c19e980a9fa1e89d6bc215f
tree6292e18fb6a46e25f42b160158d15ef07612326d
parent4739a0d40b668ed4d60e048ee8ff03cd863e0987
drm: rcar-du: Add DPLL support

The implementation hardcodes a workaround for the H3 ES1.x SoC
regardless of the SoC revision, as the workaround can be safely applied
on all devices in the Gen3 family without any side effect.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
drivers/gpu/drm/rcar-du/rcar_du_crtc.c
drivers/gpu/drm/rcar-du/rcar_du_drv.c
drivers/gpu/drm/rcar-du/rcar_du_drv.h
drivers/gpu/drm/rcar-du/rcar_du_regs.h