drm/i915: Only attempt to signal the request once from the interrupt handler
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 15 Mar 2017 21:07:26 +0000 (21:07 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 15 Mar 2017 21:45:41 +0000 (21:45 +0000)
commitdb93991bf515916e181aa3ddb5a6cbc8b86bdc42
tree4fa5df16ad82773695fbc65ffea8f14ae886c10f
parent908a6cbf84db77f33d8522f8ff9d9bf34dd7441f
drm/i915: Only attempt to signal the request once from the interrupt handler

Check that request has not been signaled before acquiring a reference to
the request for signaling later in the interrupt handler.

The loading of the cacheline (for request->fence.flags) should be "free"
when followed by the locked increment of the request->fence.refcount
(which then sets the cacheline to exclusive mode), i.e. the cost of
test_bit prior to an atomic_inc should be negligible. This should
benefit us when we have a pile of bare breadcrumbs (interrupted execbuf)
where we may get interrupts faster than we can get rid of the
intel_wait, or if the device is too slow to run the bottom-half between
interrupts.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170315210726.12095-5-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_irq.c