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(parent: da9cc8d) | patch
drm/i915/gvt: refine pcode write emulation
authorWeinan Li <weinan.z.li@intel.com>
Wed, 22 Feb 2017 03:03:24 +0000 (11:03 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 23 Feb 2017 09:33:15 +0000 (17:33 +0800)
commitd8a355be0b2b5613f7b34aee1394369d45d50586
treeaadf69e7d2a4898677dc6deca6949405438b3e8btree | snapshot (tar.gz zip)
parentda9cc8de22aa6bd6ed51c406432d599ab520a6e3commit | diff
drm/i915/gvt: refine pcode write emulation

In GVT-g we always emulate as pcode read/write success and ready for access
anytime, since we don't touch real physical registers here.

Add 'SKL_PCODE_CDCLK_CONTROL' write emulation, without it will cause
skl_set_cdclk fail in guest.

Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c diff | blob | blame | history