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(parent: 736561a) | patch
sfc: Siena: Disable write-combining when SR-IOV is enabled
authorSteve Hodgson <shodgson@solarflare.com>
Tue, 22 Mar 2011 19:46:43 +0000 (19:46 +0000)
committerBen Hutchings <bhutchings@solarflare.com>
Wed, 23 Mar 2011 01:35:15 +0000 (01:35 +0000)
commitd88d6b05fee3cc78e5b0273eb58c31201dcc6b76
treeba6286ba53298271070c217492f39bdb259681e4tree | snapshot (tar.gz zip)
parent736561a01f11114146b1b7f82d486fa9c95828efcommit | diff
sfc: Siena: Disable write-combining when SR-IOV is enabled

If SR-IOV is enabled by firmware, even if it is not enabled in the PCI
capability, TX pushes using write-combining may be corrupted.

We want to know whether it is enabled before mapping the NIC
registers, and even if PCI extended capabilities are not accessible.
Therefore, we look for the MSI capability, which is removed if SR-IOV
is enabled.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
drivers/net/sfc/efx.c diff | blob | blame | history
drivers/net/sfc/workarounds.h diff | blob | blame | history