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(parent: c4be8c6) | patch
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
authorChen-Yu Tsai <wens@csie.org>
Wed, 31 May 2017 07:58:23 +0000 (15:58 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 31 May 2017 19:57:30 +0000 (21:57 +0200)
commitd85da227c3ae43d9ca513d60f244213cb4e55485
treee79a871a9911bf02179fdd86ea6f65549b7f6344tree | snapshot (tar.gz zip)
parentc4be8c68e6900b1811bc64f74cb13d5032a389cecommit | diff
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM

The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun50i-a64.h diff | blob | blame | history
include/dt-bindings/clock/sun50i-a64-ccu.h diff | blob | blame | history