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(parent: 9e05fa1) | patch
drm/radeon/dce8: properly handle interlaced timing
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 11 Jul 2012 22:02:10 +0000 (18:02 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 26 Jun 2013 20:11:39 +0000 (16:11 -0400)
commitd798f2f2c3caee220a437697569fb519db5e643a
tree9b44594c9a7be3f0cf21777118ab3cdbee376caftree | snapshot (tar.gz zip)
parent9e05fa1d24667fc2008e7f631aefd09acad80d77commit | diff
drm/radeon/dce8: properly handle interlaced timing

The register bits changed on DCE8 compared to previous
families.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/atombios_encoders.c diff | blob | blame | history
drivers/gpu/drm/radeon/cik_reg.h diff | blob | blame | history