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(parent: a03bc7c) | patch
drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 5 Nov 2015 18:50:19 +0000 (10:50 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 18 Nov 2015 10:21:50 +0000 (11:21 +0100)
commitd72f9d919a60e5096105237a72f046b7a20fb53f
tree49b1567648709da74c95288918d9b747d2471c7btree | snapshot (tar.gz zip)
parenta03bc7cd633760ae0312327b6e30ec8fe962a798commit | diff
drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop.

According to VESA DP Spec, setting TEST_SINK_START (bit 0)
of TEST_SINK (00270h) "Stop/Start calculating CRC on the next frame"

So let's wait at least 1 vblank to really say the calculation
stopped or started.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c diff | blob | blame | history