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drm/i915: Don't set the fence number in DPFC_CTL on SNB
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 21 Nov 2013 19:29:45 +0000 (21:29 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 25 Nov 2013 08:43:18 +0000 (09:43 +0100)
commitd629336b6af9ff214e9d1e7224946a000fc8f70f
tree254bb8ae056ee88115c6e6fb54b8fcf5aa683dedtree | snapshot (tar.gz zip)
parentb33ecdd1cdeb90ca07dd28d648558e87c8680443commit | diff
drm/i915: Don't set the fence number in DPFC_CTL on SNB

SNB has another register where the actual FBC CPU fence number is
stored. The documenation explicitly states that the fence number
in DPFC_CTL must be 0 on SNB. And in fact when it's not zero,
the GTT tracking simply doesn't work.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c diff | blob | blame | history