greybus: platform: Add platform driver for DB3 AP bridge

greybus: platform: Add platform driver for DB3 AP bridge

With DB3, we now have AP as a master as far as AP bridges are concerned.
SVC will talk only to AP and AP will control bridges; unlike other
module interfaces.

So AP supposed to manage/control bridges in all power states including
power on reset.

During power on reset AP should follow below sequence -

Sequence (treated as a Cold Boot)

Stage-1
=======
AP:
 - Power On (Power up from PMIC to AP)
 - AP start booting
   Since power to AP bridges are controlled through gpio, power is gated
   to APB1 & 2
   No ref_clk to APB available (under SVC's control)
 - AP configures USB hub to enable HSIC interface to APB
 - As part of platform driver probe, AP follow below sequence
   - Set the pinctrl in default state
   - Hold APBs in reset by pulling down reset pin
   - Enable power to APB by enabling regulator and switches
   - De-assert (set 'low') 'boot_ret' signal
 - AP will assert (set 'high') the wake_detect signal, triggering
   connect/detect event to the SVC
 - AP waits for wake pulse from SVC

 SVC:
 - Power On (power up from PMIC to SVC)
 - SVC starts booting
 - SVC will de-assert reset signal to unipro switch
   - Switch starts booting
 - SVC confirms switch boot status using SPI (or something)
 - SVC waits for 300 msec (ES2 known issue)
 - SVC waits for detect/connect event from AP

Stage-2
=======
SVC:
 - ON connect/detect event, SVC send back wake pulse (cold boot)
   to AP over wake_detect pin, if SVC boot is completed.

AP:
 - On wake pulse from SVC (for cold boot), AP de-asserts (set high')
   reset signal to APB 1 and/or 2
 - Bridges starts booting
 - Eventually Unipro linkup occurs

Testing:

 - Build tested against Helium kernel
 - Due to unavailability of MSM and DB3 platform, only minimal testing
   has been done.
 - Code has been modified for validation on Helium + SDB platform.
    Mostly dts changes for gpio numbers
    And debug messages to check gpio values
 - On Helium + SDB platform, with addition of debug messages validated
   the sequence.

TODO list:

 - Currently _only_ supports power on sequence (cold boot).
   Both warm and cold boot support. Cold and Warm boot is
   differentiated based on pulse width of wake_detect signal
      >=5 msec = Cold boot else Warm boot
 - No support for Power management
   So the "power-down", "power-off", "wake_in" and "wake_out"
   signals are not explored/implemented.
 - Support for Work thread
    repetitive wake signal if no response from peer
    May required for PM support, as we have delays in the sequences
 - pinctrl states, specially to make sure we enable right pullup or pulldown
   when we set wake_detect pin to input
 - Convert gpio list into an array, and associated xxx-gpio-name property

Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>