drm/i915: clean up interlaced pipeconf bit definitions
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 28 Jan 2012 13:49:19 +0000 (14:49 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 Feb 2012 16:21:49 +0000 (17:21 +0100)
commitd442ae181ba86085c3add085d5cb4482a8ccca68
tree87429ada4b348f95043618a3c906bcd5e137363f
parent9edd576d89a5b6d3e136d7dcab654d887c0d25b7
drm/i915: clean up interlaced pipeconf bit definitions

- Clarify which bits are for which chips.
- Note that gen2 can't do interlaced directly (only via dvo tv chips).
- Move the mask to the top to make it clearer how wide this field is.
- Add defintions for all possible values.

This patch doesn't change any code.

v2: Paulo Zanoni pointed out that the pixel doubling modes do no
longer exist on ivb.

Cc: Peter Ross <pross@xvid.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Christopher Egert <cme3000@gmail.com>
Tested-by: Alfonso Fiore <alfonso.fiore@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h