drm/i915: fix PCH PLL assertion check for 3 pipes
authorJesse Barnes <jbarnes@virtuousgeek.org>
Wed, 12 Oct 2011 16:27:42 +0000 (09:27 -0700)
committerKeith Packard <keithp@keithp.com>
Thu, 20 Oct 2011 22:26:43 +0000 (15:26 -0700)
commitd3ccbe8670520fc61cbe974c97761b0dfc57f6df
treea3cfec0ebd4390f5dc02cb07844aa2ed3aaa9937
parent75770564c90c45618003267f4cdde4bbc090f1bd
drm/i915: fix PCH PLL assertion check for 3 pipes

Add a couple of checks now that we're using the 3rd transcoder:
  1) make sure the transcoder PLL enable bit is set for the transcoder
     in question
  2) when checking actual PLL enable, use the selected PLL number rather
     than the transcoder number (they could be different now)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/intel_display.c