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author	Ben Skeggs <bskeggs@redhat.com>
	Fri, 5 Jul 2013 00:26:20 +0000 (10:26 +1000)
committer	Ben Skeggs <bskeggs@redhat.com>
	Fri, 5 Jul 2013 03:44:52 +0000 (13:44 +1000)
commit	d196e16ebf8bc9489ee3dc41dc5dfd84a70cec18
tree	6dfd266b79ce92b5ec62a7452f2906071e2a6aa4	tree \| snapshot (tar.gz zip)
parent	0bfd6f734a99ce2c7217571c45c2456ae1da63c3	commit \| diff

drm/nvc0-/gr: factor out yet more unknown magic into versioned functions

NVC1/NVD9 are the only chipsets that should have anything different
happen on them after this. We previously weren't doing these
register modifications, and NVIDIA do.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

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drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c		diff \| blob \| blame \| history
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h		diff \| blob \| blame \| history