drm/i915/bxt: Enable BXT DSI PLL
authorShashank Sharma <shashank.sharma@intel.com>
Tue, 1 Sep 2015 14:11:38 +0000 (19:41 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 23 Sep 2015 08:08:48 +0000 (10:08 +0200)
commitcfe01a5eba1ff5723f3a47895fb7e9d890edf157
treeae8741c7a9258f1aa98cf9e069558ca920d6bf11
parent83e3337204b2385d20e149c8fe91bb2719978df2
drm/i915/bxt: Enable BXT DSI PLL

This patch adds new functions for BXT clock and PLL programming.
They are:
1. configure_dsi_pll for BXT.
   This function does the basic math and generates the divider ratio
   based on requested pixclock, and program clock registers.
2. enable_dsi_pll function.
   This function programs the calculated clock values on the PLL.
3. intel_enable_dsi_pll
   Wrapper function to use same code for multiple platforms. It checks the
   platform and calls appropriate core pll enable function.

v2: Fixed Jani's review comments. Macros are adjusted as per convention.

v3: Removed a redundant change wrt code comment.

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_dsi.c
drivers/gpu/drm/i915/intel_dsi.h
drivers/gpu/drm/i915/intel_dsi_pll.c