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(parent: 1a78d93) | patch
perf/x86/intel: Avoid rewriting DEBUGCTL with the same value for LBRs
authorAndi Kleen <ak@linux.intel.com>
Fri, 20 Mar 2015 17:11:24 +0000 (10:11 -0700)
committerIngo Molnar <mingo@kernel.org>
Thu, 2 Apr 2015 15:33:20 +0000 (17:33 +0200)
commitcd1f11de69226cc7ce7e7f22bdab9010103ddaa6
tree6543b48a8b40ab87617790a9a40a5cc52ea1828btree | snapshot (tar.gz zip)
parent1a78d93750bb5f61abdc59a91fc3bd06a214542acommit | diff
perf/x86/intel: Avoid rewriting DEBUGCTL with the same value for LBRs

perf with LBRs on has a tendency to rewrite the DEBUGCTL MSR with
the same value. Add a little optimization to skip the unnecessary
write.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1426871484-21285-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel_lbr.c diff | blob | blame | history