GPIO: MIPS: lantiq: fix overflow inside stp-xway driver
authorJohn Crispin <blogic@openwrt.org>
Wed, 11 Jul 2012 14:33:43 +0000 (16:33 +0200)
committerJohn Crispin <blogic@openwrt.org>
Thu, 13 Sep 2012 08:31:00 +0000 (10:31 +0200)
commitc9e854cf940fbc09846c255895efceb3bc9bf095
treee56a5460f02e9c415d10ffa718d5d78d062f4b82
parent6a88a0f762a61f212d4bbcf1ad45369f28014484
GPIO: MIPS: lantiq: fix overflow inside stp-xway driver

The driver was using a 16 bit field for storing the shadow value of the shift
register cascade. This resulted in only the first 2 shift registeres receiving
the correct data. The third shift register would always receive 0x00.

Fix this by using a 32bit field for the shadow value.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-kernel@vger.kernel.org
drivers/gpio/gpio-stp-xway.c