ARM: imx: clk-vf610: define PLL's clock tree
authorStefan Agner <stefan@agner.ch>
Mon, 27 Oct 2014 16:40:44 +0000 (17:40 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Tue, 4 Nov 2014 05:40:14 +0000 (13:40 +0800)
commitc72c553249bb73705f594e292a8f8750027fbcbe
tree4f22f54b3ce15f2dd5433d343a3d6b75c40cc396
parent0df1f2487d2f0d04703f142813d53615d62a1da4
ARM: imx: clk-vf610: define PLL's clock tree

So far, the required PLL's (PLL1/PLL2/PLL5) have been initialized
by boot loader and the kernel code defined fixed rates according
to those default configurations. Beginning with the USB PLL7 the
code started to initialize the PLL's itself (using imx_clk_pllv3).

However, since commit dc4805c2e78ba5a22ea1632f3e3e4ee601a1743b
(ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver)
imx_clk_pllv3 no longer takes care of the ENABLE and BYPASS bits,
hence the USB PLL were not configured correctly anymore.

This patch not only fixes those USB PLL's, but also makes use of
the imx_clk_pllv3 for all PLL's and alignes the code with the PLL
support of the i.MX6 series.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/clk-vf610.c
include/dt-bindings/clock/vf610-clock.h