drm/i915/gen8: Re-order init pipe_control in lrc mode
authorArun Siluvery <arun.siluvery@linux.intel.com>
Fri, 19 Jun 2015 17:37:11 +0000 (18:37 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 23 Jun 2015 12:01:40 +0000 (14:01 +0200)
commitc4db7599194248214b343d1ef1a1bc53d6cff187
treea1bd1cd6df43bf4bf05949f964077786833737ca
parent17ee950df38b649d8431e2f6f7f85282d89f5398
drm/i915/gen8: Re-order init pipe_control in lrc mode

Some of the WA applied using WA batch buffers perform writes to scratch page.
In the current flow WA are initialized before scratch obj is allocated.
This patch reorders intel_init_pipe_control() to have a valid scratch obj
before we initialize WA.

v2: Check for valid scratch page before initializing WA as some of them
perform writes to it.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_lrc.c