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ACPICA: Clear PM register write-only bits on reading
authorLin Ming <ming.m.lin@intel.com>
Thu, 19 Mar 2009 01:51:01 +0000 (09:51 +0800)
committerLen Brown <len.brown@intel.com>
Fri, 27 Mar 2009 16:11:03 +0000 (12:11 -0400)
commitc3dd25f4c1ca84baa170c0a3a15a884f4f06297e
tree817cc0715dcc8e4d546cee10fce6d2d09553e80ftree | snapshot (tar.gz zip)
parentf9ca058430333c9a24c5ca926aa445125f88df18commit | diff
ACPICA: Clear PM register write-only bits on reading

Affects PM1 Control register only. When reading the register, zero
the write-only bits as per the ACPI spec.  ACPICA BZ 443. Lin Ming.

http://www.acpica.org/bugzilla/show_bug.cgi?id=443

Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
drivers/acpi/acpica/aclocal.h diff | blob | blame | history
drivers/acpi/acpica/hwregs.c diff | blob | blame | history