[COMMON] i2c: exynos5: set HSI2C s/w reset without clear
authorYoungmin Nam <youngmin.nam@samsung.com>
Mon, 5 Sep 2016 12:53:37 +0000 (21:53 +0900)
committermyung-su.cha <myung-su.cha@samsung.com>
Wed, 9 May 2018 12:14:45 +0000 (21:14 +0900)
commitc385009b1567e66849af1fda7f3701894674dbc6
treeda963c60f5b9070c1e2de6b787c8c2e9592447d2
parent02720fac73cf7217b6d4ca8c74eb458be512bbfb
[COMMON] i2c: exynos5: set HSI2C s/w reset without clear

This patch sets HSI2C s/w reset before suspend without clear to
prevent central sequence stuck by HSI2C master clock reuqest.

Change-Id: I0cc38923758db76a73d96a331af79dc99d6b863f
Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com>
drivers/i2c/busses/i2c-exynos5.c