drm/radeon: improve PLL limit handling in post div calculation
authorChristian König <christian.koenig@amd.com>
Sun, 20 Apr 2014 11:24:32 +0000 (13:24 +0200)
committerChristian König <christian.koenig@amd.com>
Sun, 20 Apr 2014 15:16:12 +0000 (17:16 +0200)
commitc2fb3094669a3205f16a32f4119d0afe40b1a1fd
treeafd86e556d3d300c0302e98925be5a801c275430
parent24315814239a3fdb306244c99bd076bc79db4ade
drm/radeon: improve PLL limit handling in post div calculation

This improves the PLL parameters when we work at
the limits of the allowed ranges.

Signed-off-by: Christian König <christian.koenig@amd.com>
drivers/gpu/drm/radeon/radeon_display.c