clk: tegra: Add new fields and PLL types for Tegra114
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Wed, 3 Apr 2013 14:40:41 +0000 (17:40 +0300)
committerStephen Warren <swarren@nvidia.com>
Thu, 4 Apr 2013 22:10:52 +0000 (16:10 -0600)
commitc1d1939c5163088e5f12011c6b3a6a9fab40215f
treeec620d8dc4385b1687627535915cf5cb4f8caf62
parent3e72771e210348fbd7ff0ea1b9e14cd88380c05b
clk: tegra: Add new fields and PLL types for Tegra114

Tegra114 introduces new PLL types. This requires new clocktypes as well
as some new fields in the pll structure.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
drivers/clk/tegra/clk-pll.c
drivers/clk/tegra/clk.h