kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Wed, 26 Sep 2018 16:32:37 +0000 (17:32 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 24 Nov 2019 07:22:53 +0000 (08:22 +0100)
commitc1997d7041c75a82502cbd895f223e532bccc931
tree7b540a4c670f58c5946a6e48a511da12786a01e4
parent1a41082b01127d33048446f8b82beb32c7bdf580
kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table

[ Upstream commit d2db7773ba864df6b4e19643dfc54838550d8049 ]

So far we have only supported 3 level page table with fixed IPA of
40bits, where PUD is folded. With 4 level page tables, we need
to check if the PUD entry is valid or not. Fix stage2_flush_memslot()
to do this check, before walking down the table.

Acked-by: Christoffer Dall <cdall@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
virt/kvm/arm/mmu.c