powerpc/mm: Don't track subpage valid bit in pte_t
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Tue, 1 Dec 2015 03:36:45 +0000 (09:06 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 14 Dec 2015 04:19:10 +0000 (15:19 +1100)
commitbf680d51605662aae5482d87e0e0a54ba6db056b
treedb17e9a9754e2f9fc10daa3bbb30ece19d21ba88
parent106713a14590cd7b223db000f4f47f7d1d898153
powerpc/mm: Don't track subpage valid bit in pte_t

This free up 11 bits in pte_t. In the later patch we also change
the pte_t format so that we can start supporting migration pte
at pmd level. We now track 4k subpage valid bit as below

If we have _PAGE_COMBO set, we override the _PAGE_F_GIX_SHIFT
and _PAGE_F_SECOND. Together we have 4 bits, each of them
used to indicate whether any of the 4 4k subpage in that group
is valid. ie,

[ group 1 bit ]   [ group 2 bit ]  ..... [ group 4 ]
[ subpage 1 - 4]  [ subpage 5- 8]  ..... [ subpage 13 - 16]

We still track each 4k subpage slot number and secondary hash
information in the second half of pgtable_t. Removing the subpage
tracking have some significant overhead on aim9 and ebizzy benchmark and
to support THP with 4K subpage, we do need a pgtable_t of 4096 bytes.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/book3s/64/hash-4k.h
arch/powerpc/include/asm/book3s/64/hash-64k.h
arch/powerpc/include/asm/book3s/64/hash.h
arch/powerpc/mm/hash64_64k.c
arch/powerpc/mm/hash_low_64.S
arch/powerpc/mm/hugetlbpage-hash64.c
arch/powerpc/mm/pgtable_64.c