powerpc/powernv: allocate sparse PE# when using M64 BAR in Single PE mode
authorWei Yang <weiyang@linux.vnet.ibm.com>
Thu, 22 Oct 2015 01:22:19 +0000 (09:22 +0800)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 10 Feb 2016 01:04:58 +0000 (12:04 +1100)
commitbe283eeb7f6d9165b3c50f5222123ac25cf0d417
treecbdeff6e6f39fed957564c9bfc9cb705efead599
parentdfcc8d45c33baa670f20fe4860adb3ffde39cecf
powerpc/powernv: allocate sparse PE# when using M64 BAR in Single PE mode

When M64 BAR is set to Single PE mode, the PE# assigned to VF could be
sparse.

This patch restructures the code to allocate sparse PE# for VFs when M64
BAR is set to Single PE mode. Also it rename the offset to pe_num_map to
reflect the content is the PE number.

Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/pci-bridge.h
arch/powerpc/platforms/powernv/pci-ioda.c