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(parent: 5b3b168) | patch
MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.
authorDavid Daney <ddaney@caviumnetworks.com>
Thu, 11 Dec 2008 23:33:22 +0000 (15:33 -0800)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 11 Jan 2009 09:57:21 +0000 (09:57 +0000)
commitbd6d85c21a5adf24567fdb235aa8e7c8c95d5847
tree873767fba58ccbc1b4ae55aa8f16ef4b8ec5c246tree | snapshot (tar.gz zip)
parent5b3b16880f404ca54126210ca86141cceeafc0cfcommit | diff
MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.

For Cavium CPU, we treat the same as R10000, in that all hazards
are dealt with in hardware.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/hazards.h diff | blob | blame | history