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mlxsw: reg: Use correct offset in field definiton
authorIdo Schimmel <idosch@mellanox.com>
Wed, 27 Jan 2016 14:20:26 +0000 (15:20 +0100)
committerDavid S. Miller <davem@davemloft.net>
Thu, 28 Jan 2016 23:55:32 +0000 (15:55 -0800)
commitbbeeda27abc516af51ddd93c555b6324559dbb3b
tree17f141658ffb17429f377deb95f0d4767eded954tree | snapshot (tar.gz zip)
parent3f47f867814cdb08cd43d4b82f95bfde4a9ae579commit | diff
mlxsw: reg: Use correct offset in field definiton

The rx_lane, tx_lane and module fields in the PMLP register don't have
an additional offset besides the base one (0x04), so set it to 0x00.

Fixes: 4ec14b7634b2 ("mlxsw: Add interface to access registers and process events")
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | blame | history