xtensa: clear timer IRQ unconditionally in its handler
authorMax Filippov <jcmvbkbc@gmail.com>
Wed, 16 Oct 2013 22:42:24 +0000 (02:42 +0400)
committerChris Zankel <chris@zankel.net>
Tue, 14 Jan 2014 18:19:57 +0000 (10:19 -0800)
commitbae07f8a9dfaf6268f2fba5522b70bce6fc7d718
treeb18ad1da0f8842dbec11f4d8b3398edb64472b31
parent996232393bcdfff49de31e1bc1c431fd8bce9ccb
xtensa: clear timer IRQ unconditionally in its handler

PIC irq_ack doesn't clear timer IRQ, because timer interrupt handler
usually set up new timer by writing to ccompare register and thus
clearing timer IRQ. However timer may not be set up in the IRQ handler,
e.g. with tickless idle on SMP, or when CPU is going offline, leaving
timer IRQ raised and making do_interrupt attempting to handle it
forever.

To fix this always write current value of ccompare SR chosen to be linux
timer back to that SR on entry to timer interrupt handler.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
arch/xtensa/kernel/time.c