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mlxsw: reg: Add Port Prio To Buffer register
authorIdo Schimmel <idosch@mellanox.com>
Wed, 6 Apr 2016 15:10:00 +0000 (17:10 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 6 Apr 2016 21:24:16 +0000 (17:24 -0400)
commitb98ff151b659b08f71cc2e21ce7044da6662b314
tree7da5d76598055e35f288e71a4a1f6500eb6aa80atree | snapshot (tar.gz zip)
parent92b6d35fac3f15fa9f8e833030e3c743e04fb0e5commit | diff
mlxsw: reg: Add Port Prio To Buffer register

When packets ingress the switch they are assigned a switch priority
number that dictates the packet's priority group (PG) buffer in the
port's headroom buffer.

Add the Port Prio To Buffer (PPTB) register, which configures the switch
priority to PG mapping.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | blame | history