ARM: perf: extend interrupt-affinity property for PPIs
authorWill Deacon <will.deacon@arm.com>
Mon, 29 Jun 2015 12:59:01 +0000 (13:59 +0100)
committerWill Deacon <will.deacon@arm.com>
Fri, 31 Jul 2015 14:01:14 +0000 (15:01 +0100)
commitb6c084d7aa8bca21920cbbe13ad58572fa85ece6
tree5dfcdb11b45a7e62cb9d36810304973240c23b73
parent8ae81c25cfe962a788a28e023d9a78934d807f7d
ARM: perf: extend interrupt-affinity property for PPIs

On systems containing multiple, heterogeneous clusters we need a way to
associate a PMU "device" with the CPU(s) on which it exists. For PMUs
that signal overflow with SPIs, this relationship is determined via the
"interrupt-affinity" property, which contains a list of phandles to CPU
nodes for the PMU. For PMUs using PPIs, the per-cpu nature of the
interrupt isn't enough to determine the set of CPUs which actually
contain the device.

This patch allows the interrupt-affinity property to be specified on a
PMU node irrespective of the interrupt type. For PPIs, it identifies
the set of CPUs signalling the PPI in question.

Tested-by: Stephen Boyd <sboyd@codeaurora.org> # Krait PMU
Signed-off-by: Will Deacon <will.deacon@arm.com>
Documentation/devicetree/bindings/arm/pmu.txt
arch/arm/kernel/perf_event.c